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Serial ATA

Serial ATA

SATA is a storage-interface for connecting host bus adapters to mass storage devices such as hard disk drives.
ARINC429bus DSymbolic The ARINC 429 Decode (D) option provides Symbolic decode with transparent color-coded decode overlays, protocol tables, and search capabilities.
ARINC429bus DME Symbolic The ARINC 429 Decode (D) and Decode, Measure/Graph and Eye Diagram (DME) options both provide Symbolic decode with transparent color-coded decode overlays, protocol tables, and search capabilities. Measure/Graph (M) provides automated protocol-specific bus performance, timing, and digital data extraction measurements and waveforms. Eye Diagram (E) provides one button eye diagram creation from the physical layer signal, various eye measurements and pass/fail indications/debug.
QPHY-BroadR-Reach Automotive Ethernet enables faster data communication to meet the demands of today’s vehicles and the connected vehicles of the future. QPHY-BroadR-Reach automates testing and validation of 100 Mb/s Automotive Ethernet, which is described in both the BroadR-Reach and 100Base-T1 (IEEE 802.3bw) specifications.
SAS Sierra T244 The Sierra T244 is a SAS 4.0 protocol analyzer designed to non-intrusively capture up to four 24 Gb/s SAS logical links providing unmatched analysis and debug capabilities for developers working on next generation storage systems, devices and software.
AudioBus - I2S Teledyne LeCroy’s Serial AudioBus trigger, decode, and graph package provides all the tools needed to properly analyze and debug digital audio buses. Teledyne LeCroy’s solution addresses the I2S, LJ, RJ, and TDM variations of the audio bus standard.
MDIO Decode The Media Data Input/Output (MDIO) decoder provides a fast and easy way to understand and correlate MDIO bus traffic to the management of PHYs or physical layer devices in media access controllers (MACs).
10-Gigabit Ethernet Decode The 10-Gigabit Ethernet decode option for Teledyne LeCroy oscilloscopes provides link layer decode information annotated on the 10-Gigabit physical layer waveform. This provides the ability to view protocol traffic on the oscilloscope. It also aids in debugging problems that are not solely analog or digital in nature - issues not evident with a Protocol Analyzer
14GBIT-80B-SYMBOL-TD Rapidly pinpoint and debug problems with NRZ, 8b/10b and 64b/66b signals using the high-speed serial trigger and decode options. Hardware trigger products with maximum bitrates of 6.5 and 14.1 Gbps are available for WaveMaster 8 Zi-A, LabMaster 9 Zi-A and LabMaster 10 Zi series oscilloscopes, and include 8b/10b and 64b/66b decoders.
1553 TD The MIL-STD-1553 Trigger Decode solution provides high performance triggers and transparent color-coded decode overlays, protocol tables, and search capabilities.
1553 TDME The MIL-STD-1553 Trigger Decode solution provides high performance triggers and transparent color-coded decode overlays, protocol tables, and search capabilities.
8B10B 8b10b Decode Option
8b10b WR6Zi 8b10b WR6Zi Decode Option
Automotive Bundle Trigger and Decode The Automotive Bundle Trigger and Decode is offered for selected oscilloscope product lines only. In all supported product lines, it contains the capabilities included in CANbus TD and LINbus TD, and some oscilloscope product lines also support FlexRaybus TD as well (reference oscilloscope product lines for complete support). For more information on this product, please see the product pages for CANbus TD, LINbus TD, and FlexRaybus TD.
CAN FDbus TD The CAN FD Trigger Decode (TD) solution provides high performance triggers and transparent color-coded decode overlays, protocol tables, and search capabilities for both CAN and CAN FD.
CAN FDbus TDME The CAN FD Trigger, Decode, Measure/Graph and Eye Diagram (TDME) solution provides high performance triggers and transparent color-coded decode overlays, protocol tables, and search capabilities, Measure/Graph (M) capability with automated measurement and graphing tools, and Eye Diagram (E) capability for physical layer signal assessment and debug for both CAN and CAN FD. Symbolic DBC files may be used to set up the trigger, display symbolic decodes, and select parameters for serial digital data extraction to an analog value.
CAN FDbus TDME Symbolic The CAN FD Trigger, Decode, Measure/Graph and Eye Diagram solution with Symbolic support (TDME Symbolic) provides high performance triggers and transparent color-coded decode overlays, protocol tables, and search capabilities, Measure/Graph (M) capability with automated measurement and graphing tools, and Eye Diagram (E) capability for physical layer signal assessment and debug for both CAN and CAN FD. Symbolic DBC files may be used to set up the trigger, display symbolic decodes, and select parameters for serial digital data extraction to an analog value.
CANbus TD performance triggers and transparent color-coded decode overlays, protocol tables, and search capabilities.
CANbus TDME The CAN Trigger, Decode, Measure/Graph and Eye Diagram (TDME) solution provides high performance triggers, transparent color-coded decode overlays, protocol tables, and search capabilities, Measure/Graph (M) capability with automated measurement and graphing tools, and Eye Diagram (E) capability for physical layer signal assessment and debug.
D-PHYbus D - Decode option The MIPI D-PHY decode is the ideal tool for powerful system level protocol debug as well as problem solving for signal quality issues. The D-PHY decode solution adds a unique set of tools to your oscilloscope, simplifying how you design and debug MIPI D-PHY, CSI-2 and DSI signals.
D-PHYbus DP - Decode and Physical layer test option The MIPI M-PHY and D-PHY Decode and Physical Layer Test is the ideal tool for powerful system level protocol debug as well as problem solving for signal quality issues. The D-PHY decode solution adds a unique set of tools to your oscilloscope, simplifying how you design and debug MIPI D-PHY, CSI-2 and DSI signals.
DigRF 3G bus The DigRF 3G decode is the ideal tool for powerful system level protocol debug as well as problem solving for signal quality issues. The DigRF 3G decode adds a unique set of tools to your oscilloscope, simplifying how you design and debug MIPI digital RF systems.
DigRF v4 bus The DigRF 3G and v4 decode are the ideal tools for powerful system level protocol debug as well as problem solving for signal quality issues. The DigRF decodes add a unique set of tools to your oscilloscope, simplifying how you design and debug MIPI digital RF systems.
Embedded System Bundle TD The Embedded Bundle Trigger and Decode (TD) contains the capabilities included in the I2Cbus, SPIbus, and UART-RS232bus TD products. For more information on this product, please see the product pages for I2Cbus TD, SPIbus TD, and UART-RS232bus TD.
Embedded System Bundle TDME The Embedded Bundle Trigger, Decode, Measure/Graph and Eye Diagram(TDME) contains the capabilities included in the I2Cbus, SPIbus, and UART-RS232bus TDME products. For more information on this product, please see the product pages for I2Cbus TDME, SPIbus TDME, and UART-RS232bus TDME.
Ethernet Decode Ethernet Decode Ethernet decoding provides protocol awareness to the oscilloscope for fast debugging.
Fibre Channel Decode The FCbus D decode annotation option is available for most Teledyne LeCroy oscilloscopes. It permits link and data layer decoding of 1, 2, 4, or 8GFC (1.0625 Gb/s to 8.5 Gb/s) Fibre Channel physical layer signals.
FlexRaybus TD The FlexRay Trigger Decode (TD) solution provides high performance triggers and transparent color-coded decode overlays, protocol tables, and search capabilities.
FlexRaybus TDMP The FlexRay Trigger Decode (TD) and Trigger, Decode, Measure/Graph and Physical Layer (TDMP) solutions both provide high performance triggers and transparent color-coded decode overlays, protocol tables, and search capabilities. The TDMP option also provides Measure/Graph (M) capability with automated measurement and graphing tools and Physical Layer and Eye Diagram (P) capability for advanced physical layer signal assessment and debug.
HSPT Option for 4-6 GHz Oscilloscopes & Disk Drive Analyzers
I2Cbus TD The I2C Trigger Decode (TD) solution provides high performance triggers and transparent color-coded decode overlays, protocol tables, and search capabilities.
I2Cbus TDME The I2C Trigger, Decode, Measure/Graph and Physical Layer (TDME) solution provides high performance triggers, transparent color-coded decode overlays, protocol tables, and search capabilities, Measure/Graph capability with automated measurement and graphing tools, and Eye Diagram capability for physical layer signal assessment and debug.
LINbus TD The LIN Trigger Decode (TD) solution provides high performance triggers and transparent color-coded decode overlays, protocol tables, and search capabilities.
LINbus TDME The LIN Trigger Decode (TD) and Trigger, Decode, Measure/Graph and Physical Layer (TDME) solutions both provide high performance triggers and transparent color-coded decode overlays, protocol tables, and search capabilities. The TDME option also provides Measure/Graph (M) capability with automated measurement and graphing tools and Eye Diagram (E) capability for physical layer signal assessment and debug.
M-PHYbus D - Decode option The MIPI M-PHY and D-PHY Decode and Physical Layer Test is the ideal tool for powerful system level protocol debug as well as problem solving for signal quality issues. The D-PHY decode solution adds a unique set of tools to your oscilloscope, simplifying how you design and debug MIPI D-PHY, CSI-2 and DSI signals.
M-PHYbus DP - Decode and Physical layer test option The MIPI M-PHY and D-PHY Decode and Physical Layer Test is the ideal tool for powerful system level protocol debug as well as problem solving for signal quality issues. The D-PHY decode solution adds a unique set of tools to your oscilloscope, simplifying how you design and debug MIPI D-PHY, CSI-2 and DSI signals.
Manchester Decode Manchester coding is a line code in which the encoding of each data bit has at least one transition and 1s and 0s have equal bit width and therefore has no DC component. Manchester signals are self-clocking, which means that a clock signal can be recovered from the encoded data. Manchester Configurable protocol decoder enables grouping bits using various combinations of bit rate, polarity, idle condition, time out and more to decipherable messages. It allows decode of various protocols developed using Manchester encoding scheme.
NRZbus D NRZ (non-return-to-zero) line code is a binary code in which 1s are represented by one significant condition (usually a positive voltage) and 0s are represented by some other significant condition (usually a negative voltage), with no other neutral or rest condition. NRZ Configurable protocol decoder enables grouping bits using various combinations of bit rate, polarity, idle condition, time out and more to decipherable messages. It allows decode of various protocols developed using NRZ encoding scheme.
PCIe Decode The PCIEbus D option provides comprehensive PCI Express Gen1.x protocol decode for most efficient debug.
ProtoSync The ProtoSync option further leverages the supported Teledyne LeCroy decode annotation options (PCIEbus D, USB3bus D, USB2bus D, USB2 HSICbus D, SATAbus D, SASbus D, FCbus D) installed on the oscilloscope.
SAS bus D The SASbus D decode annotation option is available for most Teledyne LeCroy oscilloscopes. It permits link and data layer decoding of 1.5, 3, 6, or 12 Gb/s SAS physical layer signals. Decode information is annotated on the physical layer waveform. Various sections of the protocol are color-coded to make it easy to understand the protocol traffic.
SATA Trigger and Decode The SATAbus TD option provides comprehensive SATA 1.5 and 3 Gb/s protocol triggering in a WaveRunner 6 Zi oscilloscope using a true hardware protocol trigger for most efficient debug.
SENTbus D High-resolution SENT sensor and ECU message frames are intuitively decoded on the waveform, provided in an interactive table, and payload content search tools make debugging fast and effective.
SpaceWirebus D The SpaceWire decode adds a unique set of tools to your Teledyne LeCroy oscilloscope that simplifies the design, debug, and maintenance of SpaceWire systems. The high speed SpaceWire data stream is annotated directly on the physical layer waveforms. Various sections of the protocol are color-coded to make it easy to understand the protocol traffic. The decoder provides an interactive table, search, and zoom to make debugging fast and effective.
SPIbus TD The SPI Trigger solution provides high performance triggers and transparent color-coded decode overlays, protocol tables, and search capabilities.
SPMI Decode The MIPI System Power Management Interface (SPMI) decoder provides a fast and easy way to understand and correlate SPMI bus traffic to DC power rails and power management IC (PMIC) operations in mobile, handheld, and battery-powered embedded systems.
UART-RS232bus TD The UART and RS-232 Trigger Decode solution provides high performance triggers and transparent color-coded decode overlays, protocol tables, and search capabilities.
UART-RS232bus TDME The UART and RS-232 Trigger Decode (TD) and Trigger, Decode, Measure/Graph and Physical Layer (TDME) solutions both provide high performance triggers and transparent color-coded decode overlays, protocol tables, and search capabilities. The TDME option also provides Measure/Graph (M) capability with automated measurement and graphing tools and Eye Diagram (E) capability for physical layer signal assessment and debug.
UNIPRObus D The MIPI UniPro Protocol Decoder analyzes acquired M-PHY analog waveforms and provides insight into multiple levels of UniPro protocol information. Data and Control frames are presented in an intuitive table format, where selecting a frame expands its content to a color-coded symbolic level, simultaneously creating a zoom. Decode annotation information is displayed on the physical layer waveform for a quick reference.
USB 3.0 bus The USB 3.0 decode option for Teledyne LeCroy oscilloscopes provides link layer decode information annotated on the USB 3.0 physical layer waveform. This provides the ability to view protocol traffic on the oscilloscope and verify that the link is alive and transmitting properly. It also aids in debugging problems that are not solely analog or digital in nature, such as interoperability issues, uncertain error causes, and physical layer issues not evident with a Protocol Analyzer.
USB2-HSICbus D The comprehensive and intuitive deocde and easy to navigate table display enable a powerful toolset to quickly debug a USB 2.0 HSIC powered system. Combine it with ProtoSync to get a full view of all the USB 2.0 layers.
USB2bus TD performance triggers and transparent color-coded decode overlays, protocol tables, and search capabilities.
USB2bus TDME The USB2 Trigger, Decode, Measure/Graph and Physical Layer (TDME) solution provides high performance triggers (T) and transparent color-coded decode overlays, protocol tables, and search capabilities (D). The TDME option also provides Measure/Graph (M) capability with automated measurement and graphing tools and Eye Diagram (E) capability for physical layer signal assessment and debug.
DDR Debug Toolkit The DDR Debug Toolkit provides test, debug and analysis tools for the entire DDR design cycle. The unique DDR analysis capabilities provide automatic Read and Write burst separation, bursted data jitter analysis and DDR-specific measurement parameters.
ET-PMT Electrical Telecom Mask Test Package
GRL-USB-PD GRL-USB-PD software provides a simple and efficient way to perform USB-PD electrical parametric and protocol measurements. GRL-USB-PD provides waveform visibility and protocol analysis making it ideal for design and debug of USB Type-C Power Delivery silicon and end products.
GRL-USB-PD-C1 GRL-USB-PD-C1 is a flexible test controller, designed for USB-PD Compliance testing of the Unit Under Test (UUT) and more.
QPHY-10GBase-KR The Teledyne LeCroy QPHY-10GBase-KR solution automates testing for 10Gigabite Ethernet Copper Backplane base on the IEEE 802.3ap specifications. The test framework simplifies the test setup and execution of generic and common test requirements such as jitter separation, rise/fall time and transmitter equalization parameters. The guided wizard prompts the user to for specification required patterns and takes the measurements accordingly. The test report includes the test results pass/fail summary, margins and limits, as well as waveforms and measurements used during the test process.
QPHY-10GBASE-T QPHY-10GBASE-T automated compliance test software performs electrical compliance testing of the Physical Media Attachment (PMA) for 10GBASE-T Ethernet PHY, based on IEEE802.3-2008 requirements.
QPHY-DDR2 The Teledyne LeCroy QPHY-DDR2 Test Solution is the best way to characterize DDR2 memory interfaces. Capable of performing measurements on 400 MHz, 533 MHz, 667 MHz, 800 MHz, 1066 MHz and custom speed grades, QPHY-DDR2 has a full suite of Clock, Electrical and Timing tests as specified by the JEDEC Specification and Intel JEDEC Specifications Addendums.
QPHY-DDR3 The Teledyne LeCroy QPHY-DDR3 Test Solution is the best way to characterize DDR3, DDR3L, and LPDDR3 memory interfaces. Capable of performing measurements on 800 MT/s, 1066 MT/s, 1333 MT/s, 1600 MT/s, 1866 MT/s, 2133 MT/s and custom speed grades, QPHY-DDR3 has a full suite of Clock, Electrical, and Timing tests as specified by the JEDEC Specification.
QPHY-DisplayPort The QPHY-DisplayPort software option provides an automated test environment for running all of the normative real-time oscilloscope tests for sources in accordance with Version 1.2b of the Video Electronics Standards Association (VESA) DisplayPort PHY Compliance Test Specification, as well as tests for HBR3 signals at 8.1 Gbps.
QPHY-eDP QPHY-eDP provides a highly automated and easy-to-use solution for Embedded DisplayPort source testing in accordance with version 1.4 of the VESA Embedded DisplayPort PHY compliance test guideline.
QPHY-ENET Ethernet testing compliant with IEEE 802.3-2005 requires many test setups and connections and mask tests. Using Teledyne LeCroy QualiPHY-ENET these measurements are easy to setup and complete. Instructive connection diagrams and message boxes appear as pop ups on the oscilloscope screen. The connection diagram instructs the user how to change test fixture and jumper pins in order to do complete test. When the tests are complete, QualiPHY will generate a test report in PDF, HTML, or XML formats. Jitter and pulse mask tests are performed with automatic waveform alignment, and all test results feature pass/fail indicators corresponding to the standard being tested.
QPHY-HDMI2 automated and easy-to-use solution for HDMI transmitter testing in accordance with Version 2.0 of the HDMI Compliance Test Specification (including testing for version 1.4 devices).
QPHY-MIPI-DPHY - D-PHY Compliance Package Test Solution provides automated control for Teledyne LeCroy oscilloscopes for performing transmitter physical layer tests as described by the MIPI Alliance Specification for D-PHY version 1.00.00
QPHY-MIPI-MPHY The QPHY-MIPI-MPHY Test Solution provides automated control of Teledyne LeCroy oscilloscopes for performing transmitter physical layer tests as described by the MIPI Alliance Specification for M-PHY version 3.0.
QPHY-MOST150 The Teledyne LeCroy QPHY-MOST150 compliance test package provides a highly automated and easy-to-use solution to MOST compliance testing. QPHY-MOST150 will perform all electrical compliance tests as defined in the MOST150 oPHY Automotive Physical Layer Sub-Specification Rev. 1.1 and MOST150 cPHY Automotive Physical Layer Sub-Specification Rev 1.0.
QPHY-MOST50 The Teledyne LeCroy QPHY-MOST50 compliance test package provides a highly automated and easy-to-use solution to MOST compliance testing. QPHY-MOST50 will perform all electrical compliance tests as defined in the MOST Electrical Physical Layer Specification Rev. 1.1.
QPHY-PCIe The Teledyne LeCroy QPHY-PCIe Test Solution provides automated control for Teledyne LeCroy oscilloscopes for performing the entire transmitter physical layer tests as described by the Card Electro-mechanical specification Rev 1.1 and 2.0
QPHY-PCIe3 Teledyne LeCroy QPHY-PCIe3 Test Solution provides automated control for Teledyne LeCroy oscilloscopes for performing transmitter physical layer tests as described by the PCI Express Base Specification Revision 3.0 Version 0.9 and the Card Electromechanical Specification Revision 3.0 Version 0.7.
QPHY-SAS2 The Teledyne LeCroy QPHY-SAS2 Test Solution provides automated control for the SDA 8 Zi series of oscilloscopes for performing all of the transmitter physical layer tests as described by version 1.01 of the UNH IOL Serial Attached SCSI (SAS) Consortium SAS-2 6Gb/s Physical Layer Test Suite. This specification covers targets and initiators running at 1.5 Gb/s, 3.0 Gb/s and 6.0 Gb/s.
QPHY-SAS3 The QPHY-SAS3 Test Solution provides automated control of the SDA 8 Zi-A and LabMaster 10 Zi oscilloscopes for performing all of the transmitter physical layer tests as described by the T10 SAS-3 specification. This specification covers targets and initiators running at 1.5 Gb/s, 3.0 Gb/s, 6.0 Gb/s, and 12.0 Gb/s.
QPHY-SATA-TSG-RSG for SATA compliance testing to be used in conjunction with the PeRT3. By leveraging the capabilities of both the oscilloscope and the PeRT3, QPHY-SATA-TSG-RSG can automatically perform all of the PHY, TSG, OOB, and RSG tests as described by the SATA UTD 1.5. Furthermore, QPHY-SATA-TSG can be configured to test Gen1, Gen2, and Gen3 SATA PUTs.
QPHY-SFI The Teledyne LeCroy QPHY-SFI solution automates testing for SFI base on the SFF 8431 specifications. The test framework simplifies the test setup and execution of generic and common test requirements such as jitter separation, rise/fall time and transmitter equalization parameters. The guided wizard prompts the user to for specification required patterns and takes the measurements accordingly. The test report includes the test results pass/fail summary, margins and limits, as well as waveforms and measurements used during the test process.
QPHY-USB The USB package provides a complete acquisition and analysis system for USB 2.0 devices, hosts, and hubs, as specified in the USB-IF USB 2.0 Electrical Test Specification. The test software implements a full set of electrical tests for USB 2.0, including High-, Full-, and Low-speed tests and is supported by Teledyne LeCroy’s QualiPHY automated test and reporting software.
QPHY-USB3-Tx-Rx SuperSpeed USB is one of most highly anticipated standards in several years. At 10x the data rate of USB 2.0 and with new features like CTLE (continuous time linear equalization) and reference channels, SuperSpeed USB will pose new challenges to implementers.
QPHY-USB3.1-Tx-Rx QPHY-USB3.1-Tx-Rx offers an automated test package for USB 3.1 transmitter and receiver compliance testing, characterization, and debug.
SAS Sierra M244 The Teledyne LeCroy Sierra M244 is the industry’s first SAS 4.0 protocol analyzer / jammer system for testing next generation storage systems, devices and software.
SAS Sierra M124A The SAS Sierra M124A Protocol Test System is Teledyne LeCroy's 7th generation protocol analyzer system that provides 100% accurate protocol capture of both SAS (SAS 3.0) and SATA (SATA 3.0). The industry's most widely used test platform for SAS and SATA features unmatched analysis and debug capabilities to help pinpoint problems at every layer of the protocol.
SAS Sierra M122A The SAS Sierra M122A Protocol Test System is Teledyne LeCroy's 7th generation protocol analyzer system that provides 100% accurate protocol capture of both SAS (SAS 3.0) and SATA (SATA 3.0). The industry's most widely used test platform for SAS and SATA features unmatched analysis and debug capabilities to help pinpoint problems at every layer of the protocol.
SAS Sierra M6-2 The Sierra Protocol Test System is the 6th generation in the leading line of SAS/SATA protocol test solutions from the leading manufacturer of protocol test systems. Designed for the current evolution of both SAS (SAS 2.0) and SATA (SATA 3.0), the new Sierra product family sets new standards for performance while incorporating a complete range of features in a single, economical system.
SAS Sierra M6-1 The portable single port multifunctional analyzer system for SAS2 and SATA (6G)
SATA Sierra M6-2 Complete solution for Serial Attached SCSI (SAS) and Serial ATA (SATA) Protocol verification
SATA Sierra M6-1 Sierra M6-1 SATA Protocol Verification System
Protocol Analysis

Teledyne LeCroy's solution for Serial ATA testing is the SATracer/Trainer system. This all-in-one test platform offers traffic generation with integrated protocol analysis. The generator supports both Host and Device side emulation. It's a fully integrated system only slightly larger than a laptop which makes it suitable for both lab and field deployment.
SATracer provides everything needed for Serial ATA analysis including real-time hardware triggering and filtering on the critical components of Serial ATA traffic. Teledyne LeCroy's Expert Analysis software simplifies the overall debug process by using collapsible, color-coded packets to represent commands, FISs and primitives. This provides point-and-click "drill down" to lower level details along with the ease of use and understanding that Teledyne LeCroy is well known for.
SATA (Serial ATA) Overview

The storage industry is in the midst of a large-scale transition from parallel ATA, the dominant desktop storage interface, to Serial ATA. This migration reflects a broader transition across the industry to Serial technologies for computer-based communications. Driven primarily by lower voltages and costs required in future chipsets, Serial ATA is poised. For industry-wide adoption. The specification thoughtfully preserves software compatibility with the Parallel ATA command set. What's more, it offers smaller, thinner, lower cost cables that also offer compatibility at the physical layer with the emerging Serial Attached SCSI (SAS) standard.
Features

Performance - Parallel ATA does not have scalability to support several more speed doublings, and it is nearing its performance capacity. By contrast, Serial ATA defines a roadmap starting at 1.5 gigabits per second (equivalent to a data rate of 150 MB/s) and migrating to 3.0 gigabits per second (300 MB/s).
Lower Voltage - Parallel ATA's 5-volt signaling requirement will be increasingly difficult to meet as the industry continues to reduce chip core voltages. Serial ATA is better aligned with future manufacturing processes. It reduces signaling voltages to approximately 250 millivolts (1/4 volt).
Pin Count - Currently, the parallel ATA interface has 26 signal pins going into the interface chip. Serial ATA uses only 4 signal pins, improving the pin efficiency and accommodating a highly integrated chip implementation.
Improved Cabling - Parallel ATA bulky ribbon cables contain 40-pin header connector. Serial ATA introduces thin, flexible cabling scheme that offers longer cables and improved airflow within the chassis.
Software Compatible - Serial ATA is compatible at the register level with parallel ATA. This means Serial ATA requires no changes to existing software and operating systems in order to function, and it provides backward compatibility with existing operating environments.
SAS Compatibility - A significant feature offered by Serial ATA is the expectation that SATA will be form-factor compatibility with Serial Attached SCSI. SATA drives will plug directly into Serial Attached SCSI connectors and if supported in the system, will transparently operate as a SATA device. This allows systems to be deployed that can use either Serial Attached SCSI drives, for their high performance or SATA drives that will provide a lower-cost-per-megabyte storage platform.
Architecture

Serial ATA is a full duplex protocol. There is a continuous flow of signals from each device moving down the bus. The device and host are transmitting (TX) and receiving (RX) at the same time.

Serial ATA analyzers, Serial ATA protocol analyzers, SATA analyzers, Serial ATA bidirectional traffic pattern 
Bidirectional traffic pattern eliminates the need for bus negotiation overhead
Data characters vs Primitives - Primitives are the simplest elements within the Serial ATA protocol. Primitives are 32-bit DWORDs used to initiate control of the serial line functions (X_RDY, CONT, etc...). In addition to these "handshaking" and flow control signals, Primitives are also used to delimit or "frame" user data.
Serial ATA analyzers, SATA analyzers, Serial ATA protocol analyzers
Frame Information Structure (FIS) - A frame is an indivisible unit of information exchanged between a host and device. A frame consists of a SOF primitive, a Frame Information Structure (FIS), a CRC calculated over the contents of the FIS, and an EOF primitive. A FIS is the user payload of a frame; a frame is a group of Dwords that convey information between host and device as described previously.
Serial ATA analyzers, Serial ATA protocol analyzers, SATA analyzers
The figure above represents the logical structure of the Serial ATA hierarchy along with SATracer's representation of the protocol as viewed in the Teledyne LeCroy Trace™.
Links
Serial ATA Working Group 
http://www.serialata.org/
SearchStorage Serial ATA Technology 
http://www.storagesearch.com/serialata.html
T13 Technical Committee 
http://www.t13.org/
Sources: Intel Development Labs; Serial ATA Specification 1.0 Copyright 2001; Serial ATA Working Group